Picocom samples its RISC-V OpenRAN chip - eeNews Europe

Retrieved on: 2021-12-01 10:18:15

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Computing

Computer engineering

Technology

Instruction set architectures

Microcontrollers

Linux-based devices

Single-board computers

Hardware acceleration

MOS Technology

Reduced instruction set computer

Multi-core processor

RISC-V

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Picocom samples its RISC-V OpenRAN chip - eeNews Europe. View article details on HISWAI: https://www.eenewseurope.com/news/picocom-samples-its-risc-v-openran-chip

Excerpt

The chip has 3.5bn transistors and includes support for the Open RAN specifications with interfaces with a layer 2/3 stack via the SCF FAPI ...

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